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A satellite consists of many subsystem each with a specific duty. The figure below shows the subsystem for AAUSAT3.


Sub system structure of AAUSAT3.

We propose, that the main computer in the future AAUSAT4 will be a FPGA based solution with ample peripheral interfaces and storage capacity to satisfy different subsystems requirements.

The subsystem shall be viewed as logic entities meaning that more than one sub system may be hosted on the same physical computer/board.

Different sub system may demand different performance from the system they are hosted on:

  • Raw performance
  • Floating point performance
  • Memory demands (RAM)
  • Storage demands(flash,...)
  • IO (ad,da, i2c, canbus,...)
  • Power consumption
  • Sleep modes
  • Partial awake
  • and maybe much more
  • Operating system or kernel

A part of a generic subsystem can be designed in an FPGA and the rest maybe in a selected micro controller


  • A given sub system has to be selected and metrics to be extracted to give a basis for evaluation and selection.
  • HW design, SW design
  • PCB design and manufactoring according to AAU cubesat standard(if there is time for it)

A PCB from AAUSAT3.

for further information contact Jens or Jesper (jdn, jal@es.aau.dk)

notice

It is not just a fun project. The subs system architecture for AAUSAT3 (at90sam128) and operating system was a result of a fourth semester project.